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POSTSYN: Post Synthesis Process Radiant Software (64-bit) 2.0.0.64.1
Command Line: postsyn -a iCE40UP -p iCE40UP5K -t SG48 -sp High-Performance_1.2V -oc Industrial -top -w -o fft_adc_impl_1_syn.udb -ldc /home/andrew/projects/unoric_board/fft_adc_new/radiant/fft_adc/impl_1/fft_adc_impl_1.ldc -gui -msgset /home/andrew/projects/unoric_board/fft_adc_new/radiant/fft_adc/promote.xml fft_adc_impl_1.vm 
   Architecture:     iCE40UP
   Device:           iCE40UP5K
   Package:          SG48
   Performance:      High-Performance_1.2V
Reading input file 'fft_adc_impl_1.vm' ...
Reading constraint file '/home/andrew/projects/unoric_board/fft_adc_new/radiant/fft_adc/impl_1/fft_adc_impl_1.ldc' ...
Removing unused logic...
INFO - Signal memory_mux_fft_ram/addr_mem_13__N_2549[7]_2 undriven or does not drive anything - clipped
INFO - Signal memory_mux_fft_ram/addr_mem_13__N_2549[6]_2 undriven or does not drive anything - clipped
INFO - Signal memory_mux_fft_ram/addr_mem_13__N_2549[5]_2 undriven or does not drive anything - clipped
INFO - Signal memory_mux_fft_ram/addr_mem_13__N_2549[4]_2 undriven or does not drive anything - clipped
INFO - Signal i2c_slave_axil_master_inst/i2c_slave_inst/state_next[4] undriven or does not drive anything - clipped
INFO - Signal i2c_slave_axil_master_inst/i2c_slave_inst/state_next[3] undriven or does not drive anything - clipped
INFO - Signal i2c_slave_axil_master_inst/i2c_slave_inst/state_reg[4] undriven or does not drive anything - clipped
INFO - Signal i2c_slave_axil_master_inst/i2c_slave_inst/state_reg[3] undriven or does not drive anything - clipped
INFO - Signal i2c_slave_axil_master_inst/i2c_slave_inst/state_reg[2]_2 undriven or does not drive anything - clipped
INFO - Signal i2c_slave_axil_master_inst/i2c_slave_inst/state_reg[0]_2 undriven or does not drive anything - clipped
INFO - ... More signals are undriven or does not drive anything - clipped
INFO - Instance RPI_MISO_pad.vhi_inst is optimized away.
Starting design annotation....
WARNING - The preferred point for defining clocks is top level ports and driver pins. Pad delays will not be taken into consideration if clocks are defined on nets.
Writing output file 'fft_adc_impl_1_syn.udb'.
POSTSYN finished successfully.
Total CPU Time: 1 secs 
Total REAL Time: 0 secs 
Peak Memory Usage: 227 MB


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